Main teknik Paramèt
processeur
CPU: 32-ti jan ARM SC000
Revèy: 2 moso 16/32bit Timer
Revèy sistèm: sous revèy 40MHz
Revèy ekstèn: 1MHz ~ 10MHz
memwa
RAM: 10K Bytes
EEPROM:
80Kbytes
Plis pase 500,000 fwa efase ak ekri
Tan retansyon done pi gran pase 30 ane
Sipòte paj siye / paj ekri
ROM: 320 Kbytes (Itilizatè 280kbytes, CMS 40kbytes)
Entèfas
ISO / IEC 14443 Tape:
Sipòte resepsyon ankadreman / transmisyon ankadreman
Sipòte ti jan saj anti-kolizyon
Sipòte pwosesis pyès ki nan konpitè 14443-3 enstriksyon ak enstriksyon otantifikasyon chifreman ki lojik
Pi gwo pousantaj kominikasyon 848kbit/s
ISO / IEC 7816:
Konpatib ak ISO/IEC 7816 T=0/T=1 pwotokòl
Sipò pou konvansyon avanse ak ranvèse configurable
Mòd parite configurable
GPIO: 4
Karakteristik elektrik
Travay jaden fòs: 1.5A/m ~ 7.5A/m
Travay vòltaj: 1.62V ~ 5.5V
K ap travay tanperati: -25℃ ~ + 85 ℃
ESD: >4000V
Paramèt kat
Kantite moun ki: CR80 kat L 85.6×W 54×T 0.84(± 0.4)mm
Materyèl: PVC/ABS/PET/PETG/PHA, 0.13fil kwiv mm
Pwosesis enkapsilasyon: otomatik à plant otomatik liy / manyen soude
HCJ72B model chip is a dual-interface smart IC card chip developed by China Chip Design Company and compatible with J3A081 and J3H081 JAVA chips. The HCJ72B chip CPU is ARM's 32-bit SC000. It uses EEPROM data storage. Support ISO/IEC 14443 Tape, ISO / IEC 7816 T=0/T=1 communication protocol. Supports DES/3DES, SSF33, SM1/SM2/SM3/SM4, and RSA hardware algorithms. Meet the financial payment chip security requirements.
Main aplikasyon an Resident health City bus Micropayment Financial standard payment
L ': Metòd Enpresyon L ', Patone lank Enpresyon, Spot-koulè enprime, serigrafi Enpresyon, tèmik enprime, enprime Ink-jè, Digital enprime.
karakteristik sekirite: Watermark, Lazè ablation, Olografik / OVD, UV lank, Optik lank Varyab, Kache bar / kod mask, Classés Rainbow, Mikwo-tèks, Guilloche.
Gen lòt ki: IC chip done inisyalizasyon / chifreman, Done Varyab, Pèsonalize foule mayetik programed, siyati panèl, kod, nimewo seri, repouse, DOD Kòd, NBS konvèks Kòd, Mouri-koupe.