Main Technical Parameters Processor
KHOB: 32-bit ARM SC000 Timer: 2 pieces 16/32bit Timers System clock: clock source 40MHz External clock: 1MHz~10MHz
cim xeeb RAM: 10K Bytes
EEEPROM:
80KBytes More than 500,000 times erase and write Data retention time is greater than 30 Xyoos Support page wipe/page write ROM: 320 KBytes (user 280Kbytes, CMS 40Kbytes) Interface
ISO/IEC 14443 TYPEA: Supports frame reception/frame transmission Support bit-wise anti-collision Support hardware processing 14443-3 instructions and logical encryption authentication instructions Highest communication rate 848kbit/s
ISO/IEC 7816: Compatible with ISO/IEC 7816 T=0/T=1 protocol Support for forward and reverse conventions configurable Parity mode configurable GPIO: 4
Cov Yam Ntxwv Hluav Taws Xob Work field strength: 1.5A/m~7.5A/m
Ua hauj lwm voltage: 1.62V~5.5V
Ua hauj lwm kub: -25°C.+85°C ESD: >4000V
HCJ72B model chip is a dual-interface smart IC card chip developed by China Chip Design Company and compatible with J3A081 and J3H081 JAVA chips. The HCJ72B chip CPU is ARM's 32-bit SC000. It uses EEPROM data storage. Support ISO/IEC 14443 TYPEA, ISO/IEC 7816 T=0/T=1 communication protocol. Supports DES/3DES, SSF33, SM1/SM2/SM3/SM4, and RSA hardware algorithms. Meet the financial payment chip security requirements.
Main application Resident health City bus Micropayment Financial standard payment
Luam ntawv: Offset Printing, Patone ink Printing, Spot-color printing, Silkscreen Printing, Thermal printing, Ink-dav hlau luam ntawv, Printing.
Kev ruaj ntseg nta: dej, Laser ablation, Hologram/OVD, UV, Kho qhov tseeb Variable ink, Hidden barcode/Barcode mask, Qib Rainbow, Micro-phau ntawv, Guilloche.
Lwm tus: IC nti cov ntaub ntawv initialization/Encryption, Ntaub ntawv, Tus kheej magnetic stripe programmed, Xee npe, Barcode, Serial Serial nab npawb, Embossing, DOD code, NBS convex chaws, Die-cut.
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